1. Field of the Invention
The present invention relates to integrated capacitors and a method of fabricating integrated capacitors; more particularly, to the fabrication of integrated capacitors on semiconductor substrates in conjunction with the fabrication of other elements in field effect transistors.
2. Description of the Related Art
Recently, as discussed in "Design Boosts Performance of Monolithic Switched Filters," Electronics, Oct. 28, 1985, page 44 (the Switched Filters Article), benefits have been derived by forming integrated switched capacitors in silicon-gate CMOS semiconductor devices. In the integrated capacitor disclosed in the Switched Filters Article, a bottom plate of the capacitor is diffused in a semiconductor substrate, an oxide layer formed on the substrate functions as the dielectric (or insulating layer) of the capacitor, and a polysilicon layer, formed on the oxide layer, serves as the top plate of the capacitor. The Switched Filters Article discloses a method of diffusing the bottom plate of an integrated capacitor by providing a mask which allows for a rich diffusion in the substrate. The rich diffusion, which is utilized to form the bottom plate of an integrated capacitor, is provided prior to the formation of the oxide layer and the polysilicon top plate.
There are, however, difficulties with the diffusion of the capacitor plate in the substrate prior to the formation of the oxide layer. One specific problem is the difficulty in producing thin gate oxide or dielectric layers on a richly diffused, or highly doped, region of a substrate. It is well known that for a richly diffused or highly doped substrate, the growth rate of an oxide is proportional to the concentration of the diffusion or dopant ions in the underlying layer. Specifically, a higher concentration of dopant ions leads to a faster growth rate for the oxide layer. Fast growth rates make it extremely difficult to form thin (e.g., less than 1000 .ANG.) oxide layers. Further, if the doping is not uniform the thickness of the oxide layer will not be uniform. Differences in the thickness of the oxide layer will cause variations in the capacitance, and if the oxide layer is too thin a breakdown of the capacitor may occur. For both of these reasons, it is difficult to form thin oxide layers on highly doped regions of a substrate.
On the other hand, a highly doped bottom plate is desirable for an integrated capacitor in order to provide relatively constant capacitance as a function of voltage. It is also desirable, from the standpoint of fabricating both silicon-gate field effect transistors and integrated capacitors, that the associated oxide or dielectric layer be as thin as possible.
It is well known, that the capacitance C of a capacitor, as defined by the equation C=.epsilon..sub.o A/d (where A is the area of the capacitor plates and d is the separation of the plates) is directly proportional to the area of the capacitor plates and inversely proportional to the separation of the plates, i.e., the thickness of the dielectric separating the plates. Thus, reducing the thickness of the dielectric increases the capacitance, enabling a capacitor having a thinner dielectric to provide the same capacitance as a capacitor having a larger area and a thicker dielectric. For example, reducing the thickness of the oxide layer by one-half allows the area of the capacitor plates to be reduced by one-half while providing the same capacitance.